1. Field of the Invention
The present invention relates to projection displays and more specifically to that of phase locking the color filter wheel in color field-sequential projection systems.
2. Description of the Related Art
The color wheel dynamics in conventional color field-sequential projectors typically are dampened to help mitigate artifacts caused by switching sequence codes as the speed of the color filter wheel changes. As a result, these projectors can be slow to lock-up at initial spin-up and/or when the channel is changed while operating in the TV mode. For example, a typical first-generation field-sequential Digital Micromirror Device(trademark) (DMD(trademark)) projector has the following lock-up characteristics:
In earlier projectors, this was not so much of a problem since they were mostly used in graphics applications in which the displays were connected to computers displaying fixed images. When used to display television signals, however, where there are multiple channels of live video, waiting seconds for the color wheel to lock-up every time a channel is changed is undesirable.
FIG. 1 is a block diagram showing the color wheel synchronization controller in a micromirror projection display system. The controller may include a microprocessor (xcexcP) 10, a motor controller and driver 11, a motor with attached color wheel 12, and an index sensor 13. The motor controller and driver circuitry 11 provide a drive signal to the motor and the controller receives a frequency feedback signal from the color wheel/motor assembly 12. The xcexcP has two inputs; a Vsync signal and an index signal. The index signal is created by the index sensor 13 every time an index mark, located on the hub or rim of the color wheel, is observed. The xcexcP has an internal free running timer for event timing. In operation, the occurrence of Vsync captures the timer value as Vsync_toa and generates a Vsync interrupt and the occurrence of an index captures the timer value as index_toa and generates an index interrupt. These captured values are then used to determine the difference between the index and Vsync signals as
index_Vsync_difference=index_toaxe2x88x92Vsync_toa
where toa is the time-of-arrival of the signals. This difference is used to maintain a desired track point by determining a phase_error, which is defined as
phase_error=desired_phase_offsetxe2x88x92index_Vsync_difference.
FIG. 2 is a drawing of a typical color wheel 20. The wheel may have six color filter segments; e.g., two red (R) filters 21,24, two green (G) filters 22,25, and two blue (B) filters 23,26. As white light is applied to the color wheel, a sequential red-green-blue-red-green-blue (R-G-B-R-G-B) filtered light beam is output to the spatial light modulator (SLM) each revolution of the color wheel. In addition, some projection systems use an eight-segment wheel, where two clear segments are included to give a sequential light pattern of R-G-B-W-R-G-B-W. An index mark 27 is also included on the wheel, as shown.
A set of projection display operating modes, called spoke-sync modes, are defined in terms of the number of index periods divided by the corresponding number of Vsync periods; i.e.,
spoke-sync mode=num_index_periods/num_Vsync_periods.
For example in the 5/2 mode (also called 2.5xc3x97 mode) there are five index periods for every two Vsync periods. Several commonly used modes, along with the applications they are used in, are listed below:
A state counter is used to count the number of index marks over the designated number of Vsync periods for a particular spoke_sync mode. This counter counts from 0 to num_index_periodsxe2x88x921 and resets to zero or increments at the occurrence of each index interrupt. For example, for a 7/2 mode the state counter counts up to 6 (0 through 6) in two Vsync periods. However, since only one of these seven possible index mark occurrences is designated as the primary index mark to be aligned with Vsync, the worst case phase-lock correction can be as much as 1xc2xe of a wheel rotation, which requires approximately 14 seconds. This has not been a problem for most one-chip micromirror color field-sequential displays since they have been primarily used for stationary data display in which there is no motion in the image that can cause artifacts during re-lock. However, it is a problem for TV and movie displays where there is motion in the image. In this case, there is a need to minimize the phase-lock/re-lock time in order to limit the exposure to those temporal or motion artifacts caused by incorrectly swapping video buffers during the display period. When the color wheel is phase locked, the video buffer swapping occurs between display periods.
The following additional definitions are useful in understanding the color wheel phase-lock process in color field-sequential displays:                     fixed_offset        =                  minimum          ⁢                      xe2x80x83                    ⁢          delay          ⁢                      xe2x80x83                    ⁢          from          ⁢                      xe2x80x83                    ⁢          Vsync          ⁢                      xe2x80x83                    ⁢          to          ⁢                      xe2x80x83                    ⁢          primary          ⁢                      xe2x80x83                    ⁢          index                                        =                              phase_offset            ⁢                          xe2x80x83                        ⁢            when            ⁢                          xe2x80x83                        ⁢            spoke_sync            ⁢            _counter                    =          0                                                  =                      approximately            ⁢                          xe2x80x83                        ⁢            50            ⁢                          xe2x80x83                        ⁢            μsec                          ;            xe2x80x83filtered_Vsync_period=long term average of Vsync period;
xe2x80x83spoke_sync_offset=(filtered_Vsync_period *spoke_sync_counter*number_Vsync_periods)/number_index_periods,
if spoke_Vsync_offset greater than filtered_Vsync_period then spoke_Vsync_offset=spoke_sync_offset xe2x88x92filtered_Vsync_period; for example, in the 5/2 mode:
xe2x80x83desired_phase_offset=fixed_offset+spoke_sync_offset;
index_Vsync difference=index_toaxe2x88x92Vsync_toa;
                              phase_error          =                                    desired_phase              ⁢              _offset                        -                          index_              ⁢                              xe2x80x83                            ⁢              Vsync              ⁢                              xe2x80x83                            ⁢              _difference                                      ,                                =                              desired_phase            ⁢            _offset                    -                      index_            ⁢                          xe2x80x83                        ⁢            toa                    +                      Vsync            ⁢                          xe2x80x83                        ⁢            _            ⁢                          xe2x80x83                        ⁢                          toa              .                                          
In operation, the index_Vsync_difference is subtracted from the desired_phase_offset to determine the phase_error and then the loop corrects to drive the phase_error to zero, thus giving the desired_phase_offset. However, the problem in conventional sequential color projection system is that this correction takes too long and as a result produces temporal and color artifacts in the image.
FIG. 3 is a diagram showing the conditions, based on the above definitions, which exist in counter state 0. Included are the Vsync pulse 30, the index pulse 34, and the discriminator curve showing the phase_error 31 and desired track point 32. As shown, when the track_point comes in close proximity (approaches) with the Vsync pulse 30 the phase_error 31 goes positive at the desired_track_point 32. However, if the track_point crosses the Vsync pulse""s 30 leading edge position, the previous Vsync_toa is then used in the index_Vsync difference (index_toaxe2x88x92Vsync_toa) calculation causing the calculated phase error to go highly negative rather than continuing in a positive direction. This leaves about 0.6% of a color wheel rotation for the circuit to correct the speed and lock at the desired_track_point 32. If the color wheel speed error is not zero before the phase error slips past the positive to highly negative transition (see FIG. 3), the speed will be adjusted to drive the negative phase error to zero, increasing the speed error. Therefore, this condition is called a quasi-stable track point.
A major problem with conventional approaches to phase locking the color wheel is that only one of the index marks (for example, 1 of 5 for the 5/2 mode) is designated to be aligned with the Vsync pulse and the state counter is free-running; e.g., counts from 0 to 4 and rolls over. This is illustrated in the 5/2 mode timing diagram of FIG. 4, which shows the Vsync pulse 40 and the index pulse 41. There is only one physical index mark on the color wheel, but the wheel rotates 5 revolutions in 2 Vsync periods. The fixed offset is that shown for state 0, or approximately 50 xcexcSec. The Vsync period is shown divided into 5 equal segments (1-5). Depending on the counter state when a channel change occurs, the desired delay is as shown at the bottom of FIG. 4. For example, if the counter is at state 2, then the desired delay is
⅘*Vsync+fixed_offset, or if the counter is at state 3, then the desired delay is
⅕*Vsync+fixed_offset, relative to the alternate Vsync pulse.
The spoke_sync_counter chart shown earlier in Table 1 gives the conditions for each state.
FIG. 5a shows the raw discriminator curves for the five states in the 5/2 mode phase-sync system of FIG. 4 (arbitrary example). The desired delay is as follows:
If these five discriminator curves are overlaid on top of each other, an average discriminator output curve 55, as shown in FIG. 5b, results. FIG. 5c is an expanded view of this average curve showing the tracking points 56, which are a multiple series of quasi-stable points, as defined earlier in FIG. 3. This is not desirable since there is only a narrow tracking range on the order of 50 xcexcsec in phase at each point.
The tracking stability can be improved in conventional systems by considerably limiting the discriminator count from the typical xc2x120,000 range of values to xc2x11024, as shown in FIG. 6a. This shows the limited discriminator curves for states 0 through 460-64. Also shown are the unlimited discriminator curves 600-604, as discussed in FIG. 5. FIG. 6b shows these five discriminator curves 60-64 aligned relative to their tracking points to yield the average unlimited discriminator curve 65 with its multiple quasi-stable tracking point 66 (blown up view in circle) and the average limited discriminator curve 67. The limited curve 67 has been scaled by 5xc3x97 in order to more clearly show the details. As shown, this limited curve provides both an incorrectly positioned stable tracking point 68 and a correctly positioned quasi-stable tracking point 69.
Two approaches are typically used to provide stable tracking points in these systems. The first typical solution to this phase error problem is stated as follows:
1) When the calculated phase error is beyond reasonable limits (xc2x11024), substitute the phase error calculated from a previous state 1 index occurrence, since state 1 occurs in all spoke-sync-modes.
The method is
When spoke_sync_counter=1, then saved phase_error=phase_error, and then
if phasexe2x80x94error less than xe2x88x921024 or  greater than +1024, then phase_error=saved_phase_error.
The result of solution 1 is shown in FIG. 7. FIG. 7a shows the five solution 1 limited discriminator curves 70-74 for states 0 through 4, respectively, for the 5/2 spoke-sync mode. Also, shown are the unlimited discriminator curves 700-704 for illustration purposes only. FIG. 7b shows the resulting average limited 75 and unlimited 76 discriminator curves, respectively. FIG. 7c shows that this results in a single stable track point 76.
2) The second typical solution to this phase error problem is stated as follows:
When an error condition exists, correct the phase error value by adding or subtracting the filtered_Vsync_period to or from it, respectively.
The method is
If phase_error less than xe2x88x92filtered_Vsync_period/2, then phase_error=phase_error+filtered_Vsync_error or if phase_error greater than filtered_Vsync_period/2, then phase_error=phase_errorxe2x88x92filtered_Vsync_error.
The result of this solution 2 is shown in FIG. 8. FIG. 8a shows the five solution 1 limited discriminator curves 80-84 for states 0 through 4, respectively for a 5/2 spoke-sync mode. Also, shown are the unlimited discriminator curves 800-804 for illustration purposes only. FIG. 7b shows the resulting average limited 85 and unlimited 86 discriminator curves, respectively. FIG. 7c shows that this also results in a single stable track point 87.
These two color wheel phase_error correction techniques take advantage of the phase error calculated for each index mark in the case of small phase errors. The first solution substitutes a previously calculated phase error to correct the problem caused by positive phase errors that are greater than the fixed-offset. The second solution handles the problem by centering the track point for each index mark in the center of the discriminator curve. Although these two solutions solve the phase_error problem by providing stable track points, they can take a long time to lock-up and as a result are unacceptable in many TV display applications.
What is needed is a technique that can for all spoke-sync modes of operation, achieve an initial color wheel spin-up and phase-lock in less than 5 seconds and a color wheel channel change re-lock in less than 1 second. The invention disclosed herein meets these requirements. The two basic solutions discussed above are still used, but their speed is improved considerably by means of an innovative approach, which allows the spin-up and phase-lock requirements to be met.
This invention discloses a new technique for phase locking the color wheel in a color field-sequential projection system at both initial start-up and channel change re-lock. The disclosed method achieves initial color wheel spin-up and phase-lock in  less than 5 seconds and channel change re-lock in  less than 1 second for all spoke-sync modes of operation in a color field-sequential projection system.
The basic method comprises the following steps:
1. Calculate the phase error
2. Determine if loss of phase lock has occurred
3. Determine which index mark is nearest to Vsync and designate it as the primary index mark
4. Interrupt the state counter and set it so that the index mark nearest Vsync coincides with state 0
5. Re-calculate the phase error to drive the newly designated primary index mark into alignment with Vsync.
This approach assures that in the worst case the color wheel will rotate only xc2x1 one-half revolution before phase-lock occurs and for the 5/2 and 7/2 modes, phase-lock will occur in less that xc2x1 one-quarter revolution.